Topic 21. Logic design pages for CPSC 325
Binary numbers and codes (265 review-I assume you know this)
PAGE 1..Basic binary numbers.
PAGE 2...Base 10 conversion.
PAGE 3...Conversion to base 10 from binary.
PAGE 4...How the computer converts.
PAGE 5...Codes: numbers, BCD, text, raster graphics.
PAGE 6...Codes: PCM audio, computer instruction codes.
Boolean algebra
PAGE 7 ...AND OR NOT and basic postulates
PAGE 9 ...Gate representations-You are not responsible for algebraic manipulation in this course.
PAGE 10 ...How the functions derived from physical switches
PAGE 11 ...Example of electromagnetic relay; function tracing
PAGE 15 ...Canonical forms-sum of products (SOP)
PAGE 16 ...Further background for Page 15 above
PAGE 17 ...Table of all 16 2-input functions
PAGE 18 ...Hardware effect of associativity and commutativity
PAGE 19 ...NAND and NOR and associativity
PAGE 20 ...Active HIGH and active LOW ("positive" and "negative" (ugh) logic)
PAGE 21 ...De Morgan gate equivalences; logic levels
Karnaugh Maps
PAGE 22 ...Introduction
PAGE 23 ...K-map for 3 variables
PAGE 24 ...More examples
PAGE 25 ...K map for 4 variables
PAGE 26 ...Examples; complements
PAGE 27 ...K-map complements
PAGE 30 ...Don't care terms. You aren't responsible for the top of the page
PAGE 31 ...Don't care terms-example K map
Karnaugh Maps-function implementation examples
PAGE 32 ...Arbitrary 4-variable functions
PAGE 33 ...7 segment decoder
PAGE 38 ...Minimized circuit to add 9 to a 4-bit number
Miscellaneous introductory topics
PAGE 42 ...Fan in and fan out
PAGE 43 ...Multilevel implementation; factoring
PAGE 44 ...Multilevel implementation from Hayes text
PAGE 45 ...XOR and Equivalence properties
PAGE 46 ...XOR and Equivalence continued
PAGE 47 ...8-input XOR from Hayes text
MSI Combinational Logic
PAGE 48 ...Introduction
PAGE 49 ...Addition-intro
PAGE 50 ...Full adder
PAGE 51 ...Use of 4 bit adder and Lookahead carry
PAGE 55 ...BCD adder
PAGE 57 ...Binary decoder
PAGE 59 ...Encoder
Some topics not included on these pages are: 4 bit ADD/SUB, MUX design, reason for not using truth table method for implementing a 16-bit adder. You are responsible for these topics.
Intro to Sequential Logic
PAGE 64 ...Basic terms
PAGE 65 ...Basic NOR storage element
PAGE 67 ...D Latch
PAGE 69 ...Clock signals and master-slave edge-triggered flip flop
Intro to sequential analysis and synthesis
PAGE 74 ...State diagrams
PAGE 82 ...Example-state diagram
PAGE 83 ...Counters. You are responsible for the D flip flop implementation only.
PAGE 84 ...Design of a counter
PAGE 85 ...Counter example-steering functions
PAGE 90 ...Signal electrical quality
MSI sequential Logic
PAGE 91 ...Basic registers
PAGE 92 ...Serial and parallel data
PAGE 95 ...Synchronous D register
Introduction to architecture
For this section, we used the hand out x86 diagram and considered basic register-transfer algorithms for some of the main types of x86 instructions. Some other ALU topologies can be seen on the main logic design page.
